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Tiempo Secure’s new TESIC RISC-V IP passes SERMA CC EAL5+ security assessment tests

July 8, 2023

Posted by: Shriya Raban

Tiempo Secure has leveraged its long-standing know-how in the field of security IP (internet protocol) for microelectronics, to deploy its TESIC design with a RISC-V (reduced instruction set computer – five) core. This new IP is critical for any Secure Element or Secure Enclave is a important technology for building a certified secure component, to guarantee security for IoT wired or wireless communications, iSIM (integrated SIM), root of trust secure designs, and HSM (hardware security module).

TESIC is Tiempo Secure’s security architecture, which now includes a RISC-V MCU (memory controller unit), memories such as ROM (read only memory), RAM (random access memory), cache, crypto-RAM, and MRAM (magnetoresistive random access memory) non-volatile memory, random number generators, security sensors, and asynchronous crypto-accelerators, to support various types of symmetrical and asymmetrical cryptographic algorithms. Based on this IP, Tiempo Secure has designed a RISC-V test chip that was evaluated by SERMA. To conduct the security evaluation, the Tiempo Secure design was manufactured in the form of a test chip, using Global Foundry GF22 FDX (full duplex) technology with MRAM. This also enabled Tiempo to validate the compatibility of TESIC with GF22 technology.

During the series of tests which were carried out over 5 months, particular emphasis was placed on side channel attacks and fault attacks. To reach the highest security assessment level, the die was packaged without resin, therefore making it more vulnerable and boosting the potential success rates of attacks. The result of the evaluation was enabling Tiempo to validate both the hardware and software countermeasures implemented in the circuit that had been subjected to the tests.

Marc Renaudin, Tiempo Secure co-founder, and chief technology officer comments, “We are very satisfied with the outcome of the evaluation that was carried out by SERMA. This proves that our design will be ready for certification, and it also enables us to learn and continuously improve our processes and security expertise, thanks to the insights we gain from this type of independent lab evaluation”.

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